Improving broadcast channel rate using hierarchical modulation

We investigate the design of a broadcast system where the aim is to maximise the throughput. This task is usually challenging due to the channel variability. Modern satellite communications systems such as DVB-SH and DVB-S2 mainly rely on time sharing strategy to optimize throughput. They consider hierarchical modulation but only for unequal error protection or backward compatibility purposes. We propose in this article to combine time sharing and hierarchical modulation together and show how this scheme can improve the performance in terms of available rate. We present the gain on a simple channel modeling the broadcasting area of a satellite. Our work is applied to the DVB-SH standard, which considers hierarchical modulation as an optional feature.Comment: 5 pages, submitte

Asymptotic Analysis and Design of LDPC Codes for Laurent-based Optimal and Suboptimal CPM Receivers

International audienceIn this paper, we derive an asymptotic analysis for a capacity approaching design of serially concatenated turbo schemes with low density parity check (LDPC) codes and continuous phase modulation (CPM) based on Laurent decomposition. The proposed design is based on extrinsic mutual information evolution and Gaussian approximation. By inserting partial interleavers between LDPC and CPM and allowing degree-1 variable nodes under a certain constraint we show that designed rates are very close to the maximum achievable rates. Furthermore, we discuss the selection of low complexity receivers that works with the same optimized profiles

Combining Adaptive Coding and Modulation With Hierarchical Modulation in Satcom Systems

We investigate the design of a broadcast system in order to maximize throughput. This task is usually challenging due to channel variability. Forty years ago, Cover introduced and compared two schemes: time sharing and superposition coding. Even if the second scheme was proved to be optimal for some channels, modern satellite communications systems such as DVB-SH and DVB-S2 rely mainly on a time sharing strategy to optimize the throughput. They consider hierarchical modulation, a practical implementation of superposition coding, but only for unequal error protection or backward compatibility purposes. In this article, we propose to combine time sharing and hierarchical modulation together and show how this scheme can improve the performance in terms of available rate. We introduce a hierarchical 16-APSK to boost the performance of the DVB-S2 standard. We also evaluate various strategies to group the receivers in pairs when using hierarchical modulation. Finally, we show in a realistic case, based on DVB-S2, that the combined scheme can provide throughput gains greater than 10% compared to the best time sharing strategy

Making hierarchical modulation more flexible

In a broadcast system using the hierarchical modulation, the system delivers several streams with different waveforms and required Signal-to-Noise Ratio (SNR), typically SD- TV and HD-TV. At the application layer, each stream is delivered with a particular rate. The physical layer must be defined in order to optimize the protection of each stream with respect to the double constraints of both the data rates and the SNR thresholds. We show in this paper that a standard like DVB-SH is not always well adapted to meet these system constraints in operational typical cases. After exposing the current limitations of a classical hierarchical modulation approach, we present two possible adaptations to address these operational requirements and offer more flexibility in hierarchical modulation design

Codage Source-Canal conjoint : Etude qualitative du codage BCH sur R

Cet article a pour objectif de montrer l'intérêt d'un codage Source-Canal conjoint utilisant un codage BCH sur les réels face à des codages Source-Canal séparés classiques. Des résultats qualitatifs obtenus par simulation de plusieurs chaînes de transmission d'images satellitales sont présentés. Nous détaillons également dans cet article la constitution de chacune des chaînes utilisées. Les conditions de simulation sont choisies afin de fournir des éléments comparables d'un point de vue puissance de transmission

Design of Unstructured and Protograph-Based LDPC Coded Continuous Phase Modulation

In this paper, we derive an asymptotic analysis and optimization of coded CPM systems using both unstructured and protograph-based LDPC codes ensembles. First, we present a simple yet effective approach to design unstructured LDPC codes : by inserting partial interleavers between LDPC and CPM, and allowing degree-1 and degree-2 variable nodes in a controlled pattern, we show that designed codes perform that can operate very close to the maximum achievable rates. Finally, the extension to protograph based codes is discussed. We provide some simple rules to design good protograph codes with good threshold properties

Adaptive Estimation and Compensation of the Time Delay in a Periodic Non-uniform Sampling Scheme

High sampling rate Analog-to-Digital Converters (ADCs) can be obtained by time-interleaving low rate (and thus low cost) ADCs into so-called Time-Interleaved ADCs (TI-ADCs). Nevertheless increasing the sampling frequency involves an increasing sensibility of the system to desynchronization between the different ADCs that leads to time-skew errors, impacting the system with non linear distortions. The estimation and compensation of these errors are considered as one of the main challenge to deal with in TI-ADCs. Some methods have been previously proposed, mainly in the field of circuits and systems, to estimate the time-skew error but they mainly involve hardware correction and they lack of flexibility, using an inflexible uniform sampling reference. In this paper, we propose to model the output of L interleaved and desynchronized ADCs with a sampling scheme called Periodic Non-uniform Sampling of order L (PNSL). This scheme has been initially proposed as an alternative to uniform sampling for aliasing cancellation, particularly in the case of bandpass signals. We use its properties here to develop a flexible on-line digital estimation and compensation method of the time delays between the desynchronized channels. The estimated delay is exploited in the PNSL reconstruction formula leading to an accurate reconstruction without hardware correction and without any need to adapt the sampling operation. Our method can be used in a simple Built-In Self-Test (BIST) strategy with the use of learning sequences and our model appears more flexible and less electronically expensive, following the principles of “Dirty Radio Frequency” paradigm: designing imperfect analog circuits with subsequently digital corrections of these imperfections

Estimation du retard en échantillonnage périodique non uniforme - Application aux CAN entrelacés désynchronisés

Augmenter la fréquence d’échantillonnage des Convertisseurs Analogique Numérique (CAN) constitue actuellement un défi dans de nombreux domaines et en particulier dans les télécommunications. Les CAN entrelacés constituent une solution technique pour l’échantillonnage à haute fréquence. Ils sont obtenus par entrelacement temporel et multiplexage de plusieurs CAN fonctionnant à faible fréquence. Toutefois,l’opération inverse de CNA étant basée sur l’hypothèse d’un échantillonnage global uniforme, la synchronisation entre les CAN doit être parfaite. Toute désynchronisation doit être corrigée en amont ce qui nécessite une calibration et des reconfigurations coûteuses au niveau des circuits. Dans cet article, nous considérons un modèle alternatif et plus flexible pour les CAN entrelacés, basé sur l’utilisation d’un schéma d’échantillonnage non uniforme périodique. L’intérêt de ce schéma est de permettre une reconstruction exacte du signal en présence de désynchronisation lorsque celle-ci est connue. Les étapes de calibration et de reconfiguration matérielles ne sont plus alors nécessaires. La principale contribution de cet article est de proposer deux méthodes pour l’estimation de la désynchronisation l’une fonctionnant par auto-calibration du système et l’autre de manière aveugle. Les performances de ces méthodes sont évaluées en termes d’erreur de reconstruction du signa

Adaptive Estimation and Compensation of the Time Delay in a Periodic Non-uniform Sampling Scheme

High sampling rate Analog-to-Digital Converters (ADCs) can be obtained by time-interleaving low rate (and thus low cost) ADCs into so-called Time-Interleaved ADCs (TI-ADCs). Nevertheless increasing the sampling frequency involves an increasing sensibility of the system to desynchronization between the different ADCs that leads to time-skew errors, impacting the system with non linear distortions. The estimation and compensation of these errors are considered as one of the main challenge to deal with in TI-ADCs. Some methods have been previously proposed, mainly in the field of circuits and systems, to estimate the time-skew error but they mainly involve hardware correction and they lack of flexibility, using an inflexible uniform sampling reference. In this paper, we propose to model the output of L interleaved and desynchronized ADCs with a sampling scheme called Periodic Non-uniform Sampling of order L (PNSL). This scheme has been initially proposed as an alternative to uniform sampling for aliasing cancellation, particularly in the case of bandpass signals. We use its properties here to develop a flexible on-line digital estimation and compensation method of the time delays between the desynchronized channels. The estimated delay is exploited in the PNSL reconstruction formula leading to an accurate reconstruction without hardware correction and without any need to adapt the sampling operation. Our method can be used in a simple Built-In Self-Test (BIST) strategy with the use of learning sequences and our model appears more flexible and less electronically expensive, following the principles of “Dirty Radio Frequency” paradigm: designing imperfect analog circuits with subsequently digital corrections of these imperfections

Multisymbol with memory noncoherent detection of CPFSK

Multisymbol receiver is an effective method to demodulate noncoherent sequences. However it is necessary to correlate an important number of symbols in a noncoherent scheme to reach the performances carried out by optimal coherent Maximum a Posteriori (MAP) detectors such as BCJR. In this paper, we propose an advanced multisymbol receiver by adding some memory to the decision process. The advanced receiver, called here Multisymbol With Memory (MWM) takes into account the cumulative phase information unlike multisymbol algorithm and thus it can be seen as a truncated BCJR. An exact mathematical derivation is performed for this truncated BCJR. Then an implementation of the MWM detector applied to a continuous phase frequency shift keying modulation is presented. Finally an asymptotic analysis is carried out based on the achievable Symmetric Mutual Information rate. The proposed system exhibits good performances compared to classical multisymbol receivers at the expense of increased complexity and can approach the performances of a coherent receiver